—It is generally acknowledged that nanoelectronics will eventually replace traditional silicon CMOS in high-performance integrated circuits. To that end, considerable investments...
Abstract— This paper presents the design and the optimization of a parallel machine-tool composed of (i) an 3-dof actuated parallel mechanism (a linear Delta) and (ii) a 6-dof me...
— This paper presents a new memory cell structure for content addressable memory (CAM) based on magnetic tunneling junction (MTJ). Each CAM cell employs a pair of differential MT...
Abstract— In this paper we present an efficient system-onchip implementation of a 1-Gbps LDPC decoder for 4G (or beyond 3G) wireless standards. The decoder has a scalable datapa...
Abstract. A Learning Design(LD) definition under the IMS-LD standard is a complex task for the instructor because it requires a lot of time, effort and previous knowledge of the ...
Lluvia Morales, Luis A. Castillo, Juan Ferná...