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VLSID
2002
IEEE
172views VLSI» more  VLSID 2002»
16 years 7 months ago
Improvement of ASIC Design Processes
With device counts on modern-day ASICs crossing the 10 million mark, careful planning of an ASIC design project is necessary to meet time deadlines. Two problems arise in this con...
Vineet Sahula, C. P. Ravikumar, D. Nagchoudhuri
NORDICHI
2006
ACM
16 years 21 days ago
Designing familiar open surfaces
While participatory design makes end-users part of the design process, we might also want the resulting system to be open for interpretation, appropriation and change over time to...
Kristina Höök
EH
2005
IEEE
119views Hardware» more  EH 2005»
16 years 11 days ago
Evolutionary Computation Technologies for the Automated Design of Space Systems
The Evolvable Computation Group, at NASA’s Jet Propulsion Laboratory, is tasked with demonstrating the utility of computational engineering and computer optimized design for com...
Richard Terrile, Hrand Aghazarian, Michael I. Ferg...
GECCO
2005
Springer
104views Optimization» more  GECCO 2005»
16 years 8 days ago
MOEA design of robust digital symbol sets
Optimal constellation design is important in military digital communications for Quadrature Amplitude Modulation (QAM). Optimization realizes a reduced probability of bit error (P...
Richard O. Day, Abel S. Nunez, Gary B. Lamont
DATE
2003
IEEE
123views Hardware» more  DATE 2003»
16 years 1 days ago
RTOS Modeling for System Level Design
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
Andreas Gerstlauer, Haobo Yu, Daniel Gajski