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MSE
2005
IEEE
153views Hardware» more  MSE 2005»
16 years 7 days ago
ipPROCESS: Using a Process to Teach IP-Core Development
The reusing of Intellectual Property cores has been an alternative to the increasing gap between design productivity and chip complexity of emerging System-on-chip (SoC) designs. ...
Marilia Lima, Andre Aziz, Diogo José Costa ...
FDL
2003
IEEE
15 years 12 months ago
Using Symbolic Simulation for Bounded Property Checking
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
Jürgen Ruf, Prakash Mohan Peranandam, Thomas ...
EUROMICRO
1999
IEEE
15 years 11 months ago
Validation of Object Oriented Models using Animation
Experience has shown that prototypingis a valuabletechnique in the validation of designs. However, the prototype(s) can be too far semantically removed from the design. Animation ...
Ian Oliver, Stuart Kent
CATA
2010
15 years 6 months ago
A Hardware Implementation of the Advanced Encryption Standard (AES) Algorithm using SystemVerilog
In this paper, a hardware implementation of the AES128 encryption algorithm is proposed. A unique feature of the proposed pipelined design is that the round keys, which are consum...
Bahram Hakhamaneshi, Behnam S. Arad
ASAP
2009
IEEE
120views Hardware» more  ASAP 2009»
16 years 3 months ago
Design and Implementation of a Radix-4 Complex Division Unit with Prescaling
—We present a design and implementation of a radix-4 complex division unit with prescaling of the operands. Specifically, we extend the treatment of the residual bound and error...
Pouya Dormiani, Milos D. Ercegovac, Jean-Michel Mu...