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CODES
2007
IEEE
16 years 29 days ago
Secure FPGA circuits using controlled placement and routing
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
Pengyuan Yu, Patrick Schaumont
GLVLSI
2006
IEEE
165views VLSI» more  GLVLSI 2006»
16 years 20 days ago
Block alignment in 3D floorplan using layered TCG
In modern IC design, the number of long on-chip wires has been growing rapidly because of the increasing circuit complexity. Interconnect delay has dominated over gate delay as te...
Jill H. Y. Law, Evangeline F. Y. Young, Royce L. S...
ASPDAC
2007
ACM
123views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Creating Explicit Communication in SoC Models Using Interactive Re-Coding
Communication exploration has become a critical step during SoC design. Researchers in the CAD community have proposed fast and efficient techniques for comprehensive design space ...
Pramod Chandraiah, Junyu Peng, Rainer Dömer
CSCW
2000
ACM
15 years 6 months ago
A Tale of Two Toolkits: Relating Infrastructure and Use in Flexible CSCW Toolkits
The design of software toolkits embodies a fundamental tension. On the one hand, it aims to reduce programmer effort by providing prefabricated, reusable software modules encapsula...
Paul Dourish, W. Keith Edwards
191
Voted
TCAD
2008
92views more  TCAD 2008»
15 years 6 months ago
IP Watermarking Using Incremental Technology Mapping at Logic Synthesis Level
Abstract--This paper proposes an adaptive watermarking technique by modulating some closed cones in an originally optimized logic network (master design) for technology mapping. Th...
Aijiao Cui, Chip-Hong Chang, Sofiène Tahar