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147
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MEMOCODE
2007
IEEE
16 years 24 days ago
2007
IEEE
—With the arrival of nanometer technologies wire delays are no longer negligible with respect to gate delays, and timing-closure becomes a major challenge to System-on-Chip desig...
192
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OOPSLA
2010
Springer
15 years 5 months ago
2010
Springer
We present a framework that provides concurrency-enhanced versions of the GOF object-oriented design patterns. The main benefit of our work is that if programmers improve program...
184
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CORR
2010
Springer
15 years 3 months ago
2010
Springer
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power...
154
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SBCCI
2003
ACM
15 years 11 months ago
2003
ACM
As we scale down to deep submicron (DSM) technology, noise is becoming a metric of equal importance as power, speed, and area. Smaller feature sizes, low voltage, and high frequen...
154
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DAC
2006
ACM
16 years 15 days ago
2006
ACM
Silicon design implementation has become increasingly complex with the deep submicron technologies such as 90nm and below. It is common to see multiple processor cores, several ty...