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ECAI
2008
Springer
15 years 8 months ago
XTT+ Rule Design Using the ALSV(FD)
This paper presents advances in Set Attributive Logic and its application to develop tabular rule-based systems within the XTT framework. The primary goal is to extend the expressi...
Grzegorz J. Nalepa, Antoni Ligeza
FPGA
2008
ACM
145views FPGA» more  FPGA 2008»
15 years 8 months ago
FPGA interconnect design using logical effort
Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong