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ICCAD
2006
IEEE
114views Hardware» more  ICCAD 2006»
16 years 3 months ago
Studying a GALS FPGA architecture using a parameterized automatic design flow
ÊÓÙØ Ò Ð Ý× ÓÑ Ò Ø ÓØ Ö Ð Ý× Ò ÙÖÖ ÒØ È ¹ × Ò׺ Ï Ú ÔÖÓÔÓ× ÒÓÚ Ð ÐÓ ÐÐÝ ×ÝÒ ÖÓÒÓÙ× ÄÓ ÐÐÝ ËÝÒ ÖÓÒÓÙ× ´ ÄË...
Xin Jia, Ranga Vemuri
ICCAD
2002
IEEE
71views Hardware» more  ICCAD 2002»
16 years 3 months ago
Timing-driven placement using design hierarchy guided constraint generation
Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh
FMCAD
2009
Springer
16 years 1 months ago
Formal verification of analog designs using MetiTarski
William Denman, Behzad Akbarpour, Sofiène T...