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ISMVL
2007
IEEE
106views Hardware» more  ISMVL 2007»
16 years 21 days ago
Fast Addition Using Balanced Ternary Counters Designed with CMOS Semi-Floating Gate Devices
This paper presents ternary counters using balanced ternary notation. The balanced ternary counters can replace binary full adders or counters in fast adder structures. The circui...
Henning Gundersen, Yngvar Berg
KDD
2006
ACM
253views Data Mining» more  KDD 2006»
16 years 6 months ago
Adaptive Website Design Using Caching Algorithms
Visitors enter a website through a variety of means, including web searches, links from other sites, and personal bookmarks. In some cases the first page loaded satisfies the visi...
Justin Brickell, Inderjit S. Dhillon, Dharmendra S...
CSREAESA
2003
15 years 7 months ago
Designing an Embedded Electronic-Prescription Application for Home-Based Telemedicine Using OSGi Framework?
The combined benefits of Open Services Gateway Initiative (OSGi) and Smart card technologies in embedded devices have made the two technologies suitable for developing middleware ...
Patrick O. Bobbie, Sailaja H. Ramisetty, Abdul-Lat...
JCP
2008
119views more  JCP 2008»
15 years 6 months ago
Performance Comparisons, Design, and Implementation of RC5 Symmetric Encryption Core using Reconfigurable Hardware
With the wireless communications coming to homes and offices, the need to have secure data transmission is of utmost importance. Today, it is important that information is sent con...
Omar S. Elkeelany, Adegoke Olabisi
TVLSI
2008
108views more  TVLSI 2008»
15 years 6 months ago
Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel
To satisfy the advanced forward-error-correction (FEC) standards, in which the Convolutional code and Turbo code may co-exit, a prototype design of a unified Convolutional/Turbo de...
Fan-Min Li, Cheng-Hung Lin, An-Yeu Wu