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ICIP
2008
IEEE
16 years 8 months ago
Adaptive reference filtering for bidirectional disparity compensation with focus mismatches
In this paper, we consider compensation of focus mismatches for frames that are encoded with inter-view bi-prediction (B-frames) in multiview coding (MVC). We start with an analys...
PoLin Lai, Antonio Ortega, Purvin Pandit, Peng Yin...
MICRO
2009
IEEE
159views Hardware» more  MICRO 2009»
16 years 1 months ago
Adaptive line placement with the set balancing cache
Efficient memory hierarchy design is critical due to the increasing gap between the speed of the processors and the memory. One of the sources of inefficiency in current caches is...
Dyer Rolán, Basilio B. Fraguela, Ramon Doal...
MICRO
2009
IEEE
120views Hardware» more  MICRO 2009»
16 years 1 months ago
SCARAB: a single cycle adaptive routing and bufferless network
As technology scaling drives the number of processor cores upward, current on-chip routers consume substantial portions of chip area and power budgets. Since existing research has...
Mitchell Hayenga, Natalie D. Enright Jerger, Mikko...
ICCD
2008
IEEE
148views Hardware» more  ICCD 2008»
16 years 1 months ago
Adaptive SRAM memory for low power and high yield
— SRAMs typically represent half of the area and more than half of the transistors on a chip today. Variability increases as feature size decreases, and the impact of variability...
Baker Mohammad, Stephen Bijansky, Adnan Aziz, Jaco...
FPL
2009
Springer
102views Hardware» more  FPL 2009»
15 years 11 months ago
Macs: A Minimal Adaptive routing circuit-switched architecture for scalable and parametric NoCs
Networks-on-Chips (NoCs) are an emerging communication topology paradigm in single chip VLSI design, enhancing parallelism and system scalability. Processing units (PUs) connect t...
Rohit Kumar, Ann Gordon-Ross