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DATE
2003
IEEE
112views Hardware» more  DATE 2003»
15 years 11 months ago
Automatic Generation of Simulation Monitors from Quantitative Constraint Formula
System design methodology is poised to become the next big enabler for highly sophisticated electronic products. Design verification continues to be a major challenge and simulat...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
ISCA
2009
IEEE
158views Hardware» more  ISCA 2009»
16 years 19 days ago
Boosting single-thread performance in multi-core systems through fine-grain multi-threading
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...
Carlos Madriles, Pedro López, Josep M. Codi...
ACSAC
2008
IEEE
16 years 14 days ago
Systematic Signature Engineering by Re-use of Snort Signatures
Most intrusion detection systems apply the misuse detection approach. Misuse detection compares recorded audit data with predefined patterns denoted as signatures. A signature is ...
Sebastian Schmerl, Hartmut König, Ulrich Fleg...
DESRIST
2009
Springer
125views Education» more  DESRIST 2009»
15 years 10 months ago
An empirical evaluation of information security awareness levels in designing secure business processes
Information Systems Security (ISS) is critical to ensuring the integrity and credibility of digitally exchanged information in business processes. Information systems development ...
Fergle D'Aubeterre, Lakshmi S. Iyer, Rahul Singh
ISCAS
2006
IEEE
84views Hardware» more  ISCAS 2006»
16 years 2 hour ago
Power supply variation effects on timing characteristics of clocked registers
— Violations in the timing constraints of a clocked register can cause a synchronous system to malfunction. The effects of variations in the power supply voltage (VDD) on the tim...
William R. Roberts, Dimitrios Velenis