788 search results - page 78 / 158 » Design and use of a system-level specification and verificat... |
147
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CAV
2009
Springer
16 years 6 months ago
2009
Springer
D-Finder tool implements a compositional method for the verification of component-based systems described in BIP language encompassing multi-party interaction. For deadlock detecti...
139
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MOBIHOC
2009
ACM
16 years 6 months ago
2009
ACM
In this paper, we consider a non-saturated IEEE 802.11 based wireless network. We use a three-way fixed point to model the node behavior with Bernoulli packet arrivals and determi...
173
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
162
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SIMUTOOLS
2008
15 years 7 months ago
2008
Model checking is a suitable formal technique to analyze parallel programs' execution in an industrial context because automated tools can be designed and operated with very ...
144
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WSC
1998
15 years 7 months ago
1998
This paper presents Timed Petri Nets (TPN) as an analytical approach for verification of computerized queueing network simulation models at steady state. It introduces a generic a...