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APSEC
2004
IEEE
15 years 10 months ago
The Design of Evolutionary Process Modeling Languages
To formalize a software process, its important aspects must be extracted as a model. Many processes are used repeatedly, and the ability to automate a process is also desired. One...
Darren C. Atkinson, Daniel C. Weeks, John Noll
ICCAD
2006
IEEE
93views Hardware» more  ICCAD 2006»
16 years 3 months ago
Precise identification of the worst-case voltage drop conditions in power grid verification
– Identifying worst-case voltage drop conditions in every module supplied by the power grid is a crucial problem in modern IC design. In this paper we develop a novel methodology...
Nestoras E. Evmorfopoulos, Dimitris P. Karampatzak...
FPL
2009
Springer
107views Hardware» more  FPL 2009»
15 years 11 months ago
An FPGA based verification platform for HyperTransport 3.x
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
Heiner Litz, Holger Fröning, Maximilian Th&uu...
FORTE
1998
15 years 7 months ago
Hardware - Software Co-design of embedded telecommunication systems using multiple formalisms for application development
: In this paper a co-design methodology based on multiformalism modelling is presented. It defines a platform that integrates different notations and, the necessary mechanisms to h...
Nikos S. Voros, S. K. Tsasakou, C. Valderrama, S. ...
SP
2008
IEEE
15 years 6 months ago
Predictable Design of Network-Based Covert Communication Systems
This paper presents a predictable and quantifiable approach to designing a covert communication system capable of effectively exploiting covert channels found in the various layer...
Ronald William Smith, George Scott Knight