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DAC
2000
ACM
16 years 7 months ago
Formal verification of iterative algorithms in microprocessors
Contemporary microprocessors implement many iterative algorithms. For example, the front-end of a microprocessor repeatedly fetches and decodes instructions while updating interna...
Mark Aagaard, Robert B. Jones, Roope Kaivola, Kath...
ASYNC
2002
IEEE
114views Hardware» more  ASYNC 2002»
15 years 11 months ago
Checking Delay-Insensitivity: 104 Gates and Beyond
Wire and gate delays are accounted to have equal, or nearly equal, effect on circuit behavior in modern design techniques. This paper introduces a new approach to verify circuits ...
Alex Kondratyev, Oriol Roig, Lawrence Neukom, Karl...
DATE
2008
IEEE
78views Hardware» more  DATE 2008»
16 years 24 days ago
Transistor-Specific Delay Modeling for SSTA
SSTA has received a considerable amount of attention in recent years. However, it is a general rule that any approach can only be as accurate as the underlying models. Thus, varia...
Brian Cline, Kaviraj Chopra, David Blaauw, Andres ...
JCP
2008
116views more  JCP 2008»
15 years 6 months ago
Formal Verification and Visualization of Security Policies
Verified and validated security policies are essential components of high assurance computer systems. The design and implementation of security policies are fundamental processes i...
Luay A. Wahsheh, Daniel Conte de Leon, Jim Alves-F...
SIGDOC
2006
ACM
16 years 8 days ago
Workshop: communicating design patterns with TRIZ
This work will present elements of Genrich Altshuller’s Theory of Inventive Problem Solving, also known as TRIZ, and use them to describe the structural patterns found in the Ga...
John W. Stamey Jr., Ellen Domb