788 search results - page 65 / 158 » Design and use of a system-level specification and verificat... |
176
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POPL
2010
ACM
16 years 3 months ago
2010
ACM
This paper describes a novel technique for the synthesis of imperative programs. Automated program synthesis has the potential to make programming and the design of systems easier...
145
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DAC
1998
ACM
16 years 7 months ago
1998
ACM
We describe the verification of the IM: a large, complex (12,000 gates and 1100 latches) circuit that detects and marks the boundaries between Intel architecture (IA-32) instructi...
187
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DDECS
2007
IEEE
16 years 20 days ago
2007
IEEE
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
178
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DATE
2005
IEEE
15 years 12 months ago
2005
IEEE
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...
190
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CSE
2009
IEEE
16 years 1 months ago
2009
IEEE
—In this paper we present a design methodology for the identification and development of a suitable hardware platform (including dedicated hardware accelerators) for the data pl...