788 search results - page 56 / 158 » Design and use of a system-level specification and verificat... |
181
click to vote
OOPSLA
2010
Springer
15 years 4 months ago
2010
Springer
This poster presents a design language and a tool suite covering the development life-cycle of a Sense/Compute/Control (SCC) application. This language makes it possible to define...
176
click to vote
DAC
2000
ACM
16 years 7 months ago
2000
ACM
We recently introduced symbolic timing simulation (STS) using data-dependent delays as a tool for verifying the timing of fullcustom transistor-level circuit designs, and for the ...
133
click to vote
EVOW
1999
Springer
15 years 10 months ago
1999
Springer
This paper describes a new approximate approach for checking the correctness of the implementation of a protocol interface, comparing its lowlevel implementation with its high-leve...
155
click to vote
IEEESCC
2005
IEEE
15 years 12 months ago
2005
IEEE
In this paper we discuss a case study for the UK Police IT Organisation (PITO) on using a model-based approach to verifying web service composition interactions for a coordinated ...
158
click to vote
IV
2007
IEEE
16 years 17 days ago
2007
IEEE
This paper proposes a structured methodology that uses focus group interviews to evaluate Information Visualization techniques and tools. Focus groups are particularly suitable fo...