788 search results - page 32 / 158 » Design and use of a system-level specification and verificat... |
180
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CAI
2006
Springer
15 years 6 months ago
2006
Springer
In this paper, formal verification methodologies and the SPR (Safety Problem Resolver) model checking tool are used for verifying a security model's safety. The SPR tool makes...
153
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ICCAD
1994
IEEE
15 years 10 months ago
1994
IEEE
Language containment is a method for design verification that involves checking if the behavior of the system to be verified is a subset of the behavior of the specifications (pro...
181
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CCS
2009
ACM
15 years 10 months ago
2009
ACM
We present an approach for the design and analysis of an electronic voting machine based on a novel combination of formal verification and systematic testing. The system was desig...
175
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CODES
2001
IEEE
15 years 9 months ago
2001
IEEE
This paper addresses the problem of estimating cost and development effort of a system, starting from its complete or partial high-level description. In addition, some modificatio...
181
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FORMATS
2006
Springer
15 years 9 months ago
2006
Springer
In this paper, we consider a novel approach to the temporal logic verification problem of continuous dynamical systems. Our methodology has the distinctive feature that enables the...