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VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
16 years 6 months ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...
ISLPED
2005
ACM
84views Hardware» more  ISLPED 2005»
15 years 11 months ago
Hierarchical power management with application to scheduling
This paper presented a hierarchical power management architecture which aims to facilitate power-awareness in an Energy-Managed Computer (EMC) system with multiple components. The...
Peng Rong, Massoud Pedram
MICRO
2009
IEEE
137views Hardware» more  MICRO 2009»
16 years 23 days ago
ESKIMO: Energy savings using Semantic Knowledge of Inconsequential Memory Occupancy for DRAM subsystem
Dynamic Random Access Memory (DRAM) is used as the bulk of the main memory in most computing systems and its energy and power consumption has become a first-class design considera...
Ciji Isen, Lizy Kurian John
DAC
2005
ACM
16 years 7 months ago
Optimal procrastinating voltage scheduling for hard real-time systems
This paper presents an optimal procrastinating voltage scheduling (OP-DVS) for hard real-time systems using stochastic workload information. Algorithms are presented for both sing...
Yan Zhang, Zhijian Lu, John Lach, Kevin Skadron, M...
ISCAS
2006
IEEE
124views Hardware» more  ISCAS 2006»
16 years 4 days ago
Systematic design flow for dynamic data management in visual texture decoder of MPEG-4
Abstract— There is a clear trend of future embedded systems in moving toward wireless, multimedia, multi-functional and ubiquitous applications. This emerges new challenges in th...
Alexandros Bartzas, Miguel Peón Quiró...