The interconnection network plays an important role in the performance and energy consumption of a Networkon-Chip (NoC) system. In this paper, we propose a RDT(2,2,1)/α-based int...
Task to resource mapping problems are encountered during (i) hardware-software co-design and (ii) performance optimization of Network Processor systems. The goal of the first pro...
Liang Yang, Tushar Gohad, Pavel Ghosh, Devesh Sinh...
— The increasing gap between design productivity and chip complexity and the emerging Systems-On-Chip (SOC) architectural template have led to the wide utilization of reusable ha...
Jin Guo, Antonis Papanikolaou, Pol Marchal, Franck...
In this paper, we introduce a new Time Warp system called ROSS: Rensselaer’s Optimistic Simulation System. ROSS is an extremely modular kernel that is capable of achieving event...
Christopher D. Carothers, David W. Bauer, Shawn Pe...
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...