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» Design and implementation of a network simulation system
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ITCC
2005
IEEE
16 years 2 days ago
A RDT-Based Interconnection Network for Scalable Network-on-Chip Designs
The interconnection network plays an important role in the performance and energy consumption of a Networkon-Chip (NoC) system. In this paper, we propose a RDT(2,2,1)/α-based int...
Yang Yu, Mei Yang, Yulu Yang, Yingtao Jiang
ANCS
2005
ACM
16 years 2 days ago
Resource mapping and scheduling for heterogeneous network processor systems
Task to resource mapping problems are encountered during (i) hardware-software co-design and (ii) performance optimization of Network Processor systems. The goal of the first pro...
Liang Yang, Tushar Gohad, Pavel Ghosh, Devesh Sinh...
SLIP
2006
ACM
16 years 13 days ago
Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture
— The increasing gap between design productivity and chip complexity and the emerging Systems-On-Chip (SOC) architectural template have led to the wide utilization of reusable ha...
Jin Guo, Antonis Papanikolaou, Pol Marchal, Franck...
PADS
2000
ACM
15 years 11 months ago
ROSS: a high-performance, low memory, modular time warp system
In this paper, we introduce a new Time Warp system called ROSS: Rensselaer’s Optimistic Simulation System. ROSS is an extremely modular kernel that is capable of achieving event...
Christopher D. Carothers, David W. Bauer, Shawn Pe...
SBCCI
2003
ACM
135views VLSI» more  SBCCI 2003»
15 years 11 months ago
Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...
Mauricio Ayala-Rincón, Rodrigo B. Nogueira,...