Sciweavers

254 search results - page 26 / 51
» Design and VLSI Implementation of a Unified Synapse-Neuron A...
Sort
View
DAC
2000
ACM
16 years 7 months ago
GTX: the MARCO GSRC technology extrapolation system
Technology extrapolation -- the calibration and prediction of achievable design in future technology generations ? drives the evolution of VLSI system architectures, design method...
Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farin...
VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
16 years 6 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
16 years 6 months ago
Design Of Provably Correct Storage Arrays
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann
GLVLSI
2009
IEEE
164views VLSI» more  GLVLSI 2009»
16 years 22 days ago
Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip
In the context of nanoscale networks-on-chip (NoCs), each link implementation solution is not just a specific synthesis optimization technique with local performance and power im...
Daniele Ludovici, Georgi Nedeltchev Gaydadjiev, Da...
FCCM
2000
IEEE
162views VLSI» more  FCCM 2000»
15 years 10 months ago
StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox
Simplifying the programming models is paramount to the success of reconfigurable computing. We apply the principles of object-oriented programming to the design of stream archite...
Oskar Mencer, Heiko Hübert, Martin Morf, Mich...