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ISVLSI
2007
IEEE
121views VLSI» more  ISVLSI 2007»
16 years 1 months ago
Data Recovery Block Design for Impulse Modulated Power Line Communications in a Microprocessor
Power line communications (PLC) using impulse ultra wideband (UWB) in a microprocessor had been proposed for ubiquitous access of internal nodes for test/debug purposes. In this p...
Rajesh Thirugnanam, Dong Sam Ha, T. M. Mak
IPPS
2006
IEEE
16 years 27 days ago
Multi-clock pipelined design of an IEEE 802.11a physical layer transmitter
Among different wireless LAN technologies 802.11a has recently become popular due to its high throughput, large system capacity, and relatively long range. In this paper, we prop...
Maryam Mizani, Daler N. Rakhmatov
ISCAS
2005
IEEE
170views Hardware» more  ISCAS 2005»
16 years 14 days ago
Quantized LDPC decoder design for binary symmetric channels
Abstract— Binary Symmetric Channels (BSC) like the Interchip buses and the Intra-chip buses are gaining a lot of attention due to their widespread use with multimedia storage dev...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
ASPLOS
1992
ACM
15 years 11 months ago
Design and Evaluation of a Compiler Algorithm for Prefetching
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
Todd C. Mowry, Monica S. Lam, Anoop Gupta
MSS
2007
IEEE
129views Hardware» more  MSS 2007»
16 years 1 months ago
Cryptographic Security for a High-Performance Distributed File System
Storage systems are increasingly subject to attacks. Cryptographic file systems mitigate the danger of exposing data by using encryption and integrity protection methods and guar...
Roman Pletka, Christian Cachin