7530 search results - page 293 / 1506 » Design and Implementation of the YAWL System |
179
Voted
DAC
2009
ACM
16 years 7 months ago
2009
ACM
Retiming and recycling are two transformations used to optimize the performance of latency-insensitive (a.k.a. synchronous elastic) systems. This paper presents an approach that c...
183
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SBACPAD
2007
IEEE
16 years 1 months ago
2007
IEEE
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
198
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HASE
2008
IEEE
15 years 7 months ago
2008
IEEE
In this paper, we propose a randomization based technique to verify whether a manufactured chip conforms to its design or is infected by any trojan circuit. A trojan circuit can be...
170
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ISQED
2006
IEEE
16 years 24 days ago
2006
IEEE
It is well known that SRAM constitutes a large portion of modern integrated circuits, with 80% or more of the total transistors being dedicated to SRAM in a typical processor or S...
157
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ECBS
2006
IEEE
15 years 10 months ago
2006
IEEE
We present in this paper a unified paradigm for the verification and validation of software and systems engineering design models expressed in UML 2.0 or SysML. This paradigm reli...