249 search results - page 46 / 50 » Design and Implementation of the NUMAchine Multiprocessor |
163
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PPOPP
2010
ACM
16 years 26 days ago
2010
ACM
To fully exploit multicore processors, applications are expected to provide a large degree of thread-level parallelism. While adequate for low core counts and their typical worklo...
164
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CODES
2007
IEEE
16 years 11 days ago
2007
IEEE
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...
151
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SAMOS
2004
Springer
15 years 11 months ago
2004
Springer
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...
158
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CASES
2000
ACM
15 years 10 months ago
2000
ACM
Dealing with global on-chip memory allocation/de-allocation in a dynamic yet deterministic way is an important issue for upcoming billion transistor multiprocessor System-on-a-Chi...
146
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ISCA
2006
IEEE
16 years 1 days ago
2006
IEEE
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...