In a system proposed by Plaxton, Rajaraman and Richa (PRR), the expected cost of accessing a replicated object was proved to be asymptotically optimal for a static set of nodes an...
—This paper is aimed at designing a congestion control system that scales gracefully with network capacity, providing high utilization, low queueing delay, dynamic stability, and...
Fernando Paganini, Zhikui Wang, Steven H. Low, Joh...
ShareStreams (Scalable Hardware Architectures for Stream Schedulers) is a canonical architecture for realizing a range of scheduling disciplines. This paper discusses the design c...
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
Power management in data centers has become an increasingly important concern. Large server installations are designed to handle peak load, which may be significantly larger than...
Vivek Sharma, Arun Thomas, Tarek F. Abdelzaher, Ke...