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TACO
2008
130views more  TACO 2008»
15 years 6 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
IMCS
2007
78views more  IMCS 2007»
15 years 6 months ago
Usable set-up of runtime security policies
Setting up runtime security policies as required for firewalls or as envisioned by policy languages for the Semantic Web is a difficult task, especially for lay users who have l...
Almut Herzog, Nahid Shahmehri
CAD
2005
Springer
15 years 6 months ago
A new recognition model for electronic architectural drawings
Current methods for recognition and interpretation of architectural drawings are limited to either low-level analysis of paper drawings or interpretation of electronic drawings th...
Tong Lu, Chiew-Lan Tai, Feng Su, Shijie Cai
CCE
2005
15 years 6 months ago
Interactive evolutionary computation in process engineering
In practical system identification, process optimization and controller design, it is often desirable to simultaneously handle several objectives and constraints. In some cases, t...
János Madár, János Abonyi, Fe...
JMLR
2007
137views more  JMLR 2007»
15 years 6 months ago
Building Blocks for Variational Bayesian Learning of Latent Variable Models
We introduce standardised building blocks designed to be used with variational Bayesian learning. The blocks include Gaussian variables, summation, multiplication, nonlinearity, a...
Tapani Raiko, Harri Valpola, Markus Harva, Juha Ka...
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