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ICECCS
2010
IEEE
219views Hardware» more  ICECCS 2010»
15 years 6 months ago
Comparison of Six Ways to Extend the Scope of Cheddar to AADL v2 with Osate
Abstract—Cheddar is a framework dedicated to the specification of real-time schedulers, and to their analysis by simulation. It is developed in Ada. Some parts of its modular ar...
Mickaël Kerboeuf, Alain Plantec, Frank Singho...
CIDR
2009
167views Algorithms» more  CIDR 2009»
15 years 7 months ago
Unbundling Transaction Services in the Cloud
The traditional architecture for a DBMS engine has the recovery, concurrency control and access method code tightly bound together in a storage engine for records. We propose a di...
David B. Lomet, Alan Fekete, Gerhard Weikum, Micha...
KBSE
2010
IEEE
15 years 4 months ago
VikiBuilder: end-user specification and generation of visual wikis
With the need to make sense out of large and constantly growing information spaces, tools to support information management are becoming increasingly valuable. In prior work we pr...
Christian Hirsch, John G. Hosking, John C. Grundy
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
15 years 12 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
PLDI
1994
ACM
15 years 10 months ago
Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
Jack W. Davidson, Sanjay Jinturkar