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HPCA
2008
IEEE
16 years 6 months ago
Amdahl's Law in the multicore era
We apply Amdahl's Law to multicore chips using symmetric cores, asymmetric cores, and dynamic techniques that allows cores to work together on sequential execution. To Amdahl...
Mark D. Hill
DAC
2006
ACM
16 years 7 months ago
Rapid estimation of control delay from high-level specifications
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...
Gagan Raj Gupta, Madhur Gupta, Preeti Ranjan Panda
DAC
2006
ACM
16 years 7 months ago
An efficient and versatile scheduling algorithm based on SDC formulation
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
Jason Cong, Zhiru Zhang
DAC
2009
ACM
15 years 11 months ago
A computing origami: folding streams in FPGAs
Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has a...
Andrei Hagiescu, Weng-Fai Wong, David F. Bacon, Ro...
PIMRC
2008
IEEE
16 years 20 days ago
Concurrent and parallel transmissions are optimal for low data-rate IR-UWB networks
— The Internet of Things, emerging pervasive and sensor networks are low data-rate wireless networks with, a priori, no specific topology and no fixed infrastructure. Their pri...
Jean-Yves Le Boudec, Ruben Merz