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DATE
2008
IEEE
115views Hardware» more  DATE 2008»
16 years 1 months ago
Synthesizing Synchronous Elastic Flow Networks
This paper describes an implementation language and synthesis system for automatically generating latency insensitive synchronous digital designs. These designs decouple behaviora...
Greg Hoover, Forrest Brewer
DAC
2007
ACM
16 years 7 months ago
Synchronous Elastic Circuits with Early Evaluation and Token Counterflow
A protocol for latency-insensitive design with early evaluation is presented. The protocol is based on a symmetric view of the system in which tokens carrying information move in ...
Jordi Cortadella, Michael Kishinevsky
ICDCS
2003
IEEE
16 years 12 hour ago
Obstruction-Free Synchronization: Double-Ended Queues as an Example
We introduce obstruction-freedom, a new nonblocking property for shared data structure implementations. This property is strong enough to avoid the problems associated with locks,...
Maurice Herlihy, Victor Luchangco, Mark Moir
ICCAD
2005
IEEE
100views Hardware» more  ICCAD 2005»
16 years 3 months ago
Performance-centering optimization for system-level analog design exploration
In this paper we propose a novel analog design optimization methodology to address two key aspects of top-down system-level design: (1) how to optimally compare and select analog ...
Xin Li, Jian Wang, Lawrence T. Pileggi, Tun-Shih C...
TSE
2008
101views more  TSE 2008»
15 years 6 months ago
DeMIMA: A Multilayered Approach for Design Pattern Identification
Design patterns are important in object-oriented programming because they offer design motifs, elegant solutions to recurrent design problems, which improve the quality of software...
Yann-Gaël Guéhéneuc, Giuliano A...