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IJCNN
2006
IEEE
16 years 18 days ago
A Scalable FPGA Implementation of Cellular Neural Networks for Gabor-type Filtering
— We describe an implementation of Gabor-type filters on field programmable gate arrays using the cellular neural network (CNN) architecture. The CNN template depends upon the ...
Ocean Y. H. Cheung, Philip Heng Wai Leong, Eric K....
IPPS
2006
IEEE
16 years 18 days ago
Implementation of a programmable array processor architecture for approximate string matching algorithms on FPGAs
Approximate string matching problem is a common and often repeated task in information retrieval and bioinformatics. This paper proposes a generic design of a programmable array p...
Panagiotis D. Michailidis, Konstantinos G. Margari...
VLSID
2006
IEEE
145views VLSI» more  VLSID 2006»
16 years 17 days ago
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. This paper proposes two novel ...
Himanshu Thapliyal, Saurabh Kotiyal, M. B. Sriniva...
SPAA
2005
ACM
16 years 3 days ago
Using elimination to implement scalable and lock-free FIFO queues
This paper shows for the first time that elimination, a scaling technique formerly applied only to counters and LIFO structures, can be applied to FIFO data structures, specific...
Mark Moir, Daniel Nussbaum, Ori Shalev, Nir Shavit
ICA3PP
2005
Springer
16 years 7 hour ago
A Practical Comparison of Cluster Operating Systems Implementing Sequential and Transactional Consistency
Shared Memory is an interesting communication paradigm for SMP machines and clusters. Weak consistency models have been proposed to improve efficiency of shared memory applications...
Stefan Frenz, Renaud Lottiaux, Michael Schött...