Sciweavers

1084 search results - page 82 / 217
» Design and Evaluation of a Selective Compressed Memory Syste...
Sort
View
CASES
2007
ACM
15 years 10 months ago
A simplified java bytecode compilation system for resource-constrained embedded processors
Embedded platforms are resource-constrained systems in which performance and memory requirements of executed code are of critical importance. However, standard techniques such as ...
Carmen Badea, Alexandru Nicolau, Alexander V. Veid...
CAL
2007
15 years 6 months ago
Chameleon: A High Performance Flash/FRAM Hybrid Solid State Disk Architecture
—Flash memory solid state disk (SSD) is gaining popularity and replacing hard disk drive (HDD) in mobile computing systems such as ultra mobile PCs (UMPCs) and notebook PCs becau...
Jinhyuk Yoon, Eyee Hyun Nam, Yoon Jae Seong, Hongs...
IEEEPACT
2008
IEEE
16 years 21 days ago
A tuning framework for software-managed memory hierarchies
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...
Manman Ren, Ji Young Park, Mike Houston, Alex Aike...
SIGIR
2006
ACM
16 years 7 days ago
One-sided measures for evaluating ranked retrieval effectiveness with spontaneous conversational speech
Early speech retrieval experiments focused on news broadcasts, for which adequate Automatic Speech Recognition (ASR) accuracy could be obtained. Like newspapers, news broadcasts a...
Baolong Liu, Douglas W. Oard
DATE
2009
IEEE
176views Hardware» more  DATE 2009»
16 years 1 months ago
Single ended 6T SRAM with isolated read-port for low-power embedded systems
Abstract— This paper presents a six-transistor (6T) singleended static random access memory (SE-SRAM) bitcell with an isolated read-port, suitable for low-Î and low-power embedd...
Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Sara...