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ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
15 years 12 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
IEEEPACT
2007
IEEE
16 years 28 days ago
FAME: FAirly MEasuring Multithreaded Architectures
Nowadays, multithreaded architectures are becoming more and more popular. In order to evaluate their behavior, several methodologies and metrics have been proposed. A methodology ...
Javier Vera, Francisco J. Cazorla, Alex Pajuelo, O...
WCRE
2009
IEEE
16 years 1 months ago
SQUAD: Software Quality Understanding through the Analysis of Design
—Object-oriented software quality models usually use metrics of classes and of relationships among classes to assess the quality of systems. However, software quality does not de...
Foutse Khomh
BMCBI
2006
115views more  BMCBI 2006»
15 years 6 months ago
SimArray: a user-friendly and user-configurable microarray design tool
Background: Microarrays were first developed to assess gene expression but are now also used to map protein-binding sites and to assess allelic variation between individuals. Rega...
Richard P. Auburn, Roslin R. Russell, Bettina Fisc...
ISCA
2011
IEEE
313views Hardware» more  ISCA 2011»
14 years 10 months ago
FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay ...