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223
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ICIP
2006
IEEE
16 years 9 months ago
FPGA Architecture for Real-Time Video Noise Estimation
This paper proposes a hardware architecture of a video noise estimation algorithm capable of real-time processing. The objectives consist of adapting a computationally demanding n...
Francois-Xavier Lapalme, Aishy Amer, Chunyan Wang
191
Voted
DAC
2000
ACM
16 years 8 months ago
Depth optimal incremental mapping for field programmable gate arrays
In this paper, we study the incremental t echnology mapping problem for lookup-table (LUT) based Field Programmable Gate Arrays (FPGAs) under incremental changes. Given a gate-lev...
Jason Cong, Hui Huang
193
Voted
DAC
2001
ACM
16 years 8 months ago
Dynamic Voltage Scaling and Power Management for Portable Systems
Portable systems require long battery lifetime while still delivering high performance. Dynamic voltage scaling (DVS) algorithms reduce energy consumption by changing processor sp...
Tajana Simunic, Luca Benini, Andrea Acquaviva, Pet...
165
Voted
WWW
2006
ACM
16 years 8 months ago
Browsing on small screens: recasting web-page segmentation into an efficient machine learning framework
Fitting enough information from webpages to make browsing on small screens compelling is a challenging task. One approach is to present the user with a thumbnail image of the full...
Shumeet Baluja
182
Voted
VLSID
2009
IEEE
130views VLSI» more  VLSID 2009»
16 years 8 months ago
Reversible Logic Synthesis with Output Permutation
Synthesis of reversible logic has become a very important research area. In recent years several algorithms ? heuristic as well as exact ones ? have been introduced in this area. ...
Daniel Große, Gerhard W. Dueck, Robert Wille...
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