5961 search results - page 692 / 1193 » Design Science and Software Engineering |
143
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CODES
2004
IEEE
15 years 10 months ago
2004
IEEE
We present a analytical framework to identify the tradeoffs and performance impacts associated with different SoC platform configurations in the specific context of implementing m...
215
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CODES
2005
IEEE
15 years 8 months ago
2005
IEEE
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
178
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CODES
2008
IEEE
15 years 8 months ago
2008
IEEE
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
179
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AC
2008
Springer
15 years 7 months ago
2008
Springer
Sparse matrices are first class objects in many VHLLs (very high level languages) used for scientific computing. They are a basic building block for various numerical and combinat...
164
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VLSI
2010
Springer
15 years 5 months ago
2010
Springer
—Latency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elas...