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ICCD
1997
IEEE
90views Hardware» more  ICCD 1997»
15 years 10 months ago
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model
Asynchronous design has a potential of solving many difficulties, such as clock skew and power consumption, which synchronous counterpart suffers with current and future VLSI tech...
Akihiro Takamura, Masashi Kuwako, Masashi Imai, Ta...
CACM
1998
116views more  CACM 1998»
15 years 6 months ago
Binding, Migration, and Scalability in CORBA
This article explains how CORBA binds requests to object implementations with the help of an implementation repository. The design of the implementation repository has profound in...
Michi Henning
MSE
2003
IEEE
103views Hardware» more  MSE 2003»
15 years 11 months ago
Teaching IP Core Development: An Example
The increasing gap between design productivity and chip complexity, and emerging systems-on-a-chip (SoC) have led to the wide utilization of reusable intellectual property (IP) co...
Aleksandar Milenkovic, David Fatzer
VTC
2007
IEEE
113views Communications» more  VTC 2007»
16 years 24 days ago
Downlink Scheduling for Multiple Antenna Systems with Dirty Paper Coding Via Genetic Algorithms
— MIMO systems are of interest to meet the expected demands for higher data rates and lower delays in future wireless
Robert C. Elliott, Witold A. Krzymien
AIS
2006
Springer
15 years 6 months ago
Togetherness and respect: ethical concerns of privacy in Global Web Societies
Today's computer network technologies are sociologically founded on hunter-gatherer principles; common users may be possible subjects of surveillance and sophisticated Interne...
Gordana Dodig-Crnkovic, Virginia Horniak