473 search results - page 10 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
163
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DAC
2006
ACM
16 years 6 months ago
2006
ACM
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
183
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ICCAD
2003
IEEE
15 years 11 months ago
2003
IEEE
Domino circuits have been used in most modern high-performance microprocessor designs because of their high speed, low transistor-count and hazard-free operation. However, with te...
152
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ICCAD
1995
IEEE
15 years 9 months ago
1995
IEEE
Pad assignment with signal integrity optimization is very important for high-speed VLSI design. In this paper, an efficient method is proposed to effectively minimize both simulta...
167
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DAC
2005
ACM
16 years 6 months ago
2005
ACM
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
154
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DAC
1996
ACM
15 years 10 months ago
1996
ACM
A novel methodology for circuit design and automatic layout generation is proposed for a class of mixed-signal circuits in presence of layout parasitics and substrate induced nois...