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ISCA
2012
IEEE
333views Hardware» more  ISCA 2012»
13 years 9 months ago
Reducing memory reference energy with opportunistic virtual caching
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
Arkaprava Basu, Mark D. Hill, Michael M. Swift
DAGSTUHL
1996
15 years 8 months ago
A Uniform Approach for Compile-Time and Run-Time Specialization
As partial evaluation gets more mature, it is now possible to use this program transformation technique to tackle realistic languages and real-size application programs. However, t...
Charles Consel, Luke Hornof, François No&eu...
IWOMP
2007
Springer
16 years 25 days ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
TOOLS
1998
IEEE
15 years 11 months ago
The Interaction of Access Control and Object-Orientation in Extensible Systems
In this paper we describe how object-oriented language design interacts with access control in extensible systems, based on our experience in building the SPIN extensible operatin...
Wilson C. Hsieh, Przemyslaw Pardyak, Marc E. Fiucz...
APWEB
2006
Springer
15 years 10 months ago
An Energy Efficient Cross-Layer MAC Protocol for Wireless Sensor Networks
In the area of wireless sensor networks, achieving minimum energy consumption is a very important research issue. A number of energy efficient protocols have been proposed, mostly ...
Changsu Suh, Young-Bae Ko, Dong-Min Son