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DATE
2002
IEEE
96views Hardware» more  DATE 2002»
15 years 11 months ago
A Linear-Centric Simulation Framework for Parametric Fluctuations
The relative tolerances for interconnect and device parameter variations have not scaled with feature sizes which have brought about significant performance variability. As we sca...
Emrah Acar, Sani R. Nassif, Lawrence T. Pileggi
EUROMICRO
2002
IEEE
15 years 11 months ago
A Sum of Absolute Differences Implementation in FPGA Hardware
In this paper, we propose a new hardware unit that performs a 16 × 1 SAD operation. The hardware unit is intended to augment a general-purpose core. Further, we show that the 16 ...
Stephan Wong, Stamatis Vassiliadis, Sorin Cotofana
HPDC
2002
IEEE
15 years 11 months ago
Decoupling Computation and Data Scheduling in Distributed Data-Intensive Applications
In high energy physics, bioinformatics, and other disciplines, we encounter applications involving numerous, loosely coupled jobs that both access and generate large data sets. So...
Kavitha Ranganathan, Ian T. Foster
ICALP
2010
Springer
15 years 11 months ago
Dynamic Programming for Graphs on Surfaces
Abstract. We provide a framework for the design and analysis of dynamic programming algorithms for surface-embedded graphs on n vertices and branchwidth at most k. Our technique ap...
Juanjo Rué, Ignasi Sau, Dimitrios M. Thilik...
DATE
2000
IEEE
108views Hardware» more  DATE 2000»
15 years 11 months ago
A 50 Mbit/s Iterative Turbo-Decoder
Very low bit error rate has become an important constraint in high performance communication systems that operate at very low signal to noise ratios: due to their impressive codin...
F. Viglione, Guido Masera, Gianluca Piccinini, Mas...