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FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
15 years 6 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
STOC
1997
ACM
257views Algorithms» more  STOC 1997»
15 years 10 months ago
Practical Loss-Resilient Codes
We present randomized constructions of linear-time encodable and decodable codes that can transmit over lossy channels at rates extremely close to capacity. The encoding and decod...
Michael Luby, Michael Mitzenmacher, Mohammad Amin ...
AVI
2004
15 years 8 months ago
3Book: a 3D electronic smart book
This paper describes the 3Book, a 3D interactive visualization of a codex book as a component for various digital library and sensemaking systems. The book is designed to hold lar...
Stuart K. Card, Lichan Hong, Jock D. Mackinlay, Ed...
DAC
2002
ACM
16 years 7 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
EUROSYS
2006
ACM
16 years 3 months ago
Solving the starting problem: device drivers as self-describing artifacts
Run-time conflicts can affect even the most rigorously tested software systems. A reliance on execution-based testing makes it prohibitively costly to test every possible interac...
Michael F. Spear, Tom Roeder, Orion Hodson, Galen ...