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» Design: One, but in different forms
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SP
1999
IEEE
125views Security Privacy» more  SP 1999»
15 years 11 months ago
A Multi-Threading Architecture for Multilevel Secure Transaction Processing
A TCB and security kernel architecture for supporting multi-threaded, queue-driven transaction processing applications in a multilevel secure environment is presented. Our design ...
Haruna R. Isa, William R. Shockley, Cynthia E. Irv...
DAC
1997
ACM
15 years 11 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...
VR
1993
IEEE
15 years 10 months ago
A Virtual World for Network Management
Existing network management systems typically use a combination of textual displays and 2D directed graph representations of network topology. We are designing a network managemen...
Steven Feiner, Michelle X. Zhou, Laurence A. Crutc...
ASPDAC
2007
ACM
93views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Flow-Through-Queue based Power Management for Gigabit Ethernet Controller
- This paper presents a novel architectural mechanism and a power management structure for the design of an energy-efficient Gigabit Ethernet controller. Key characteristics of suc...
Hwisung Jung, Andy Hwang, Massoud Pedram
DAC
2010
ACM
15 years 10 months ago
Performance yield-driven task allocation and scheduling for MPSoCs under process variation
With the ever-increasing transistor variability in CMOS technology, it is essential to integrate variation-aware performance analysis into the task allocation and scheduling proce...
Lin Huang, Qiang Xu