3561 search results - page 170 / 713 » Design: One, but in different forms |
163
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ASYNC
2003
IEEE
15 years 11 months ago
2003
IEEE
Parameterized first-order models for throughput, energy, and bandwidth are presented in this paper. Models are developed for many common pipeline methodologies, including clocked...
171
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SBACPAD
2007
IEEE
16 years 23 days ago
2007
IEEE
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
170
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ACSD
2006
IEEE
16 years 17 days ago
2006
IEEE
In the modern design environments, different modules, available in existent libraries, may obey different architectural styles and execution models. Reaching a well– behaved com...
175
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ICCD
1997
IEEE
15 years 10 months ago
1997
IEEE
The goal of Intelligent RAM (IRAM) is to design a cost-effective computer by designing a processor in a memory fabrication process, instead of in a conventional logic fabrication ...
180
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FUN
2007
Springer
15 years 10 months ago
2007
Springer
Architectures for optical processors designed to solve bounded instances of NP-Complete problems are suggested. One approach mimics the traveling salesman by traveling beams that ...