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VR
2009
IEEE
136views Virtual Reality» more  VR 2009»
16 years 1 months ago
An Image-Warping Architecture for VR: Low Latency versus Image Quality
Designing low end-to-end latency system architectures for virtual reality is still an open and challenging problem. We describe the design, implementation and evaluation of a clie...
Ferdi A. Smit, Robert van Liere, Stephan Beck, Ber...
EMSOFT
2007
Springer
16 years 24 days ago
Buffer optimization and dispatching scheme for embedded systems with behavioral transparency
Software components are modular and can enable post-deployment update, but their high overhead in runtime and memory is prohibitive for many embedded systems. This paper proposes ...
Jiwon Hahn, Pai H. Chou
ICES
2003
Springer
88views Hardware» more  ICES 2003»
15 years 11 months ago
POEtic Tissue: An Integrated Architecture for Bio-inspired Hardware
It is clear to all, after a moments thought, that nature has much we might be inspired by when designing our systems, for example: robustness, adaptability and complexity, to name ...
Andrew M. Tyrrell, Eduardo Sanchez, Dario Floreano...
CDC
2009
IEEE
119views Control Systems» more  CDC 2009»
15 years 11 months ago
Isochronous manifolds in self-triggered control
Abstract— Feedback control laws are predominantly implemented on digital platforms as periodic tasks. Although periodicity simplifies the analysis and design of the implementati...
Adolfo Anta Martinez, Paulo Tabuada
ISCAS
2005
IEEE
124views Hardware» more  ISCAS 2005»
16 years 6 days ago
Parallel FFT computation with a CDMA-based network-on-chip
— Fast Fourier transform (FFT) algorithms are used in a wide variety of digital signal processing applications and many of these require high-performance parallel implementations...
Daewook Kim, Manho Kim, Gerald E. Sobelman