1966 search results - page 182 / 394 » Description Logics and Planning |
148
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DATE
2006
IEEE
16 years 16 days ago
2006
IEEE
—In this paper we describe a methodology to measure exactly the quality of fault-tolerant designs by combining faultinjection in high level design (HLD) descriptions with a forma...
166
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APN
2001
Springer
15 years 10 months ago
2001
Springer
We address the verification of programmable logic controllers (PLC). In our approach, a PLC program is translated into a special type of colored Petri net, a so-called register net...
177
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APAL
2006
15 years 6 months ago
2006
By a well-known result of Cook and Reckhow [4, 12], all Frege systems for the Classical Propositional Calculus (CPC) are polynomially equivalent. Mints and Kojevnikov [11] have re...
197
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FOSSACS
2007
Springer
16 years 20 days ago
2007
Springer
Abstract. We introduce an extension of Hoare logic for call-by-value higherorder functions with ML-like local reference generation. Local references may be generated dynamically an...
162
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DATE
2005
IEEE
16 years 3 days ago
2005
IEEE
In nanometer scaled CMOS devices significant increase in the subthreshold, the gate and the reverse biased junction band-toband-tunneling (BTBT) leakage, results in the large incr...