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ICFP
2008
ACM
16 years 6 months ago
Functional netlists
In efforts to overcome the complexity of the syntax and the lack of formal semantics of conventional hardware description languages, a number of functional hardware description la...
Sungwoo Park, Jinha Kim, Hyeonseung Im
WRLA
2010
15 years 5 months ago
The Linear Temporal Logic of Rewriting Maude Model Checker
Abstract. This paper presents the foundation, design, and implementation of the Linear Temporal Logic of Rewriting model checker as an extension of the Maude system. The Linear Tem...
Kyungmin Bae, José Meseguer
UAI
2007
15 years 8 months ago
A System for Ontologically-Grounded Probabilistic Matching
This paper is part of a project to match descriptions of real-world instances and probabilistic models, both of which can be described at mulvel of abstraction and detail. We use ...
Rita Sharma, David Poole, Clinton Smyth
WWW
2004
ACM
16 years 7 months ago
A possible simplification of the semantic web architecture
In the semantic web architecture, Web ontology languages are built on top of RDF(S). However, serious difficulties have arisen when trying to layer expressive ontology languages, ...
Bernardo Cuenca Grau
166
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ICCAD
1997
IEEE
99views Hardware» more  ICCAD 1997»
15 years 11 months ago
High-level area and power estimation for VLSI circuits
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
Mahadevamurty Nemani, Farid N. Najm