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» Describing Software Architecture with UML
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ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
16 years 11 days ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...
HICSS
1999
IEEE
106views Biometrics» more  HICSS 1999»
15 years 10 months ago
Automating the Interoperation of Information Processing Tools
This paper describes an agent-based architecture designed to support the interoperation of distributed and disparate information processing tools and resources. This work is based...
Stephen Cranefield, Emanuela Moreale, Bryce McKinl...
CODES
1998
IEEE
15 years 10 months ago
Hardware/software co-design of an ATM network interface card: a case study
This paper discusses a case study, the co-design of an ATM Network Interface Card (NIC). The NIC is aimed to interface applications with the physical network line. It is composed ...
Jean-Marc Daveau, Gilberto Fernandes Marchioro, Ah...
LCTRTS
1999
Springer
15 years 10 months ago
Effective Exploitation of a Zero Overhead Loop Buffer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanj...
AOSD
2007
ACM
15 years 10 months ago
Generating parallel applications for distributed memory systems using aspects, components, and patterns
Developing and debugging parallel programs particularly for distributed memory architectures is still a difficult task. The most popular approach to developing parallel programs f...
Purushotham V. Bangalore