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ACSC
2004
IEEE
15 years 10 months ago
Automatic Derivation of Loop Termination Conditions to Support Verification
This paper introduces a repeatable and constructive approach to the analysis of loop progress and termination conditions in imperative programs. It is applicable to all loops for ...
Daniel Powell
PLDI
1995
ACM
15 years 10 months ago
Improving Balanced Scheduling with Compiler Optimizations that Increase Instruction-Level Parallelism
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
Jack L. Lo, Susan J. Eggers
ASPLOS
1991
ACM
15 years 10 months ago
NUMA Policies and Their Relation to Memory Architecture
Multiprocessor memory reference traces provide a wealth of information on the behavior of parallel programs. We have used this information to explore the relationship between kern...
William J. Bolosky, Michael L. Scott, Robert P. Fi...
SNPD
2008
15 years 8 months ago
The Implementation and Execution Framework of a Role Model Based Language, EpsilonJ
In the social reality, objects communicate with each other by means of assuming roles to establish collaboration, and then can adaptively change their roles to obtain other intera...
Supasit Monpratarnchai, Tamai Tetsuo
172
Voted
CORR
2006
Springer
91views Education» more  CORR 2006»
15 years 6 months ago
Quasi-friendly sup-interpretations
In a previous paper [16], the sup-interpretation method was proposed as a new tool to control memory resources of first order functional programs with pattern matching by static an...
Jean-Yves Marion, Romain Péchoux