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DAC
2001
ACM
16 years 7 months ago
Route Packets, Not Wires: On-Chip Interconnection Networks
Using on-chip interconnection networks in place of ad-hoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules...
William J. Dally, Brian Towles
DAC
2001
ACM
16 years 7 months ago
A2BC: Adaptive Address Bus Coding for Low Power Deep Sub-Micron Designs
Due to larger buses (length, width) and deep sub-micron effects where coupling capacitances between bus lines are in the same order of magnitude as base capacitances, power consum...
Haris Lekatsas, Jörg Henkel
DAC
2002
ACM
16 years 7 months ago
IP delivery for FPGAs using Applets and JHDL
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
Michael J. Wirthlin, Brian McMurtrey
DAC
2003
ACM
16 years 7 months ago
A low-energy chip-set for wireless intercom
A low power wireless intercom system is designed and implemented. Two fully-operational ASICs, integrating custom and commercial IP, implement the entire digital portion of the pr...
M. Josie Ammer, Michael Sheets, Tufan C. Karalar, ...
DAC
2004
ACM
16 years 7 months ago
Characterizing embedded applications for instruction-set extensible processors
Extensible processors, which allow customization for an application domain by extending the core instruction set architecture, are becoming increasingly popular for embedded syste...
Pan Yu, Tulika Mitra