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DAC
1998
ACM
16 years 7 months ago
A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
Nuno Alexandre Marques, Mattan Kamon, Jacob White,...
DAC
1999
ACM
16 years 7 months ago
ICEBERG: An Embedded In-Circuit Emulator Synthesizer for Microcontrollers
This paper presents a synthesis tool ICEBERG for embedded in-circuit emulators (ICE's), that are part of the development environment for microcontroller (or microprocessor)-b...
Ing-Jer Huang, Tai-An Lu
DAC
1999
ACM
16 years 7 months ago
An Efficient Lyapunov Equation-Based Approach for Generating Reduced-Order Models of Interconnect
In this paper we present a new algorithm for computing reduced-order models of interconnect which utilizes the dominant controllable subspace of the system. The dominant controlla...
Jing-Rebecca Li, Frank Wang, Jacob White
DAC
2000
ACM
16 years 7 months ago
Compiling Esterel into sequential code
This paper presents a novel compiler for Esterel, a concurrent synchronous imperative language. It generates fast, small object code by compiling away concurrency, producing a sin...
Stephen A. Edwards
DAC
2001
ACM
16 years 7 months ago
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores
Crosstalk effects degrade the integrity of signals traveling on long interconnects and must be addressed during manufacturing testing. External testing for crosstalk is expensive ...
Li Chen, Xiaoliang Bai, Sujit Dey