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VLSID
2005
IEEE
140views VLSI» more  VLSID 2005»
16 years 6 months ago
A Novel Bus Encoding Scheme from Energy and Crosstalk Efficiency Perspective for AMBA Based Generic SoC Systems
Inter-wire coupling is a major source of power consumption and delay faults for on-chip buses implemented in UDSM SoC Systems. Elimination or minimization of such faults is crucia...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
IPPS
2005
IEEE
15 years 11 months ago
A Powerful Direct Mechanism for Optimal WWW Content Replication
This paper addresses the problem of fine-grained data replication in large distributed systems, such as the Internet, so as to minimize the user access delays. With fine-grained d...
Samee Ullah Khan, Ishfaq Ahmad
WWW
2005
ACM
15 years 11 months ago
Improved timing control for web server systems using internal state information
How to effectively allocate system resource to meet the Service Level Agreement (SLA) of Web servers is a challenging problem. In this paper, we propose an improved scheme for aut...
Xue Liu, Rong Zheng, Jin Heo, Lui Sha
ICNP
2007
IEEE
16 years 9 days ago
Multicast Algorithms for Multi-Channel Wireless Mesh Networks
— Multicast is a key technology that provides efficient data communication among a set of nodes for wireless multi-hop networks. In sensor networks and MANETs, multicast algorit...
Guo-Kai Zeng, Bo Wang 0001, Yong Ding, Li Xiao, Ma...
DAC
2004
ACM
16 years 7 months ago
A method for correcting the functionality of a wire-pipelined circuit
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
Vidyasagar Nookala, Sachin S. Sapatnekar