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SIGCOMM
1997
ACM
15 years 10 months ago
End-to-end Internet Packet Dynamics
We discuss findings from a large-scale study of Internet packet dynamics conducted by tracing 20,000 TCP bulk transfers between 35 Internet sites. Because we traced each 100 Kbyt...
Vern Paxson
DAC
1996
ACM
15 years 10 months ago
Glitch Analysis and Reduction in Register Transfer Level
: We presentdesign-for-low-power techniques based on glitch reduction for register-transfer level circuits. We analyze the generation and propagation of glitches in both the contro...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
DATE
2004
IEEE
126views Hardware» more  DATE 2004»
15 years 10 months ago
Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
Montek Singh, Michael Theobald
ICDCS
1995
IEEE
15 years 10 months ago
A Competitive Analysis for Retransmission Timeout
Protocols that provide reliable communicationon top of a network that can lose packets rely on periodically retransmitting packets. The choice of retransmission timeout critically...
Shlomi Dolev, Michael Kate, Jennifer L. Welch
FORTE
2000
15 years 8 months ago
Systematic Performance Evaluation of Multipoint Protocols
The adventof multipoint(multicast-based) applications and the growth and complexity of the Internet has complicated network protocol design and evaluation. In this paper, we prese...
Ahmed Helmy, Sandeep K. S. Gupta, Deborah Estrin, ...