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DAC
2005
ACM
16 years 7 months ago
High performance computing on fault-prone nanotechnologies: novel microarchitecture techniques exploiting reliability-delay trad
Device and interconnect fabrics at the nanoscale will have a density of defects and susceptibility to transient faults far exceeding those of current silicon technologies. In this...
Andrey V. Zykov, Elias Mizan, Margarida F. Jacome,...
VLSID
2003
IEEE
167views VLSI» more  VLSID 2003»
16 years 7 months ago
Timing Minimization by Statistical Timing hMetis-based Partitioning
In this paper we present statistical timing driven hMetisbased partitioning. We approach timing driven partitioning from a different perspective: we use the statistical timing cri...
Cristinel Ababei, Kia Bazargan
GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
15 years 11 months ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi
DEBU
1998
115views more  DEBU 1998»
15 years 6 months ago
The Case for Non-transparent Replication: Examples from Bayou
Applications that rely on replicated data have different requirements for how their data is managed. For example, some applications may require that updates propagate amongst repl...
Douglas B. Terry, Karin Petersen, Mike Spreitzer, ...
WDAG
2007
Springer
100views Algorithms» more  WDAG 2007»
16 years 23 days ago
Scalable Load-Distance Balancing
We introduce the problem of load-distance balancing in assigning users of a delay-sensitive networked application to servers. We model the service delay experienced by a user as a ...
Edward Bortnikov, Israel Cidon, Idit Keidar