568 search results - page 61 / 114 » Decoupled Hardware Support for Distributed Shared Memory |
181
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HPCA
1998
IEEE
15 years 10 months ago
1998
IEEE
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
153
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HPCA
2011
IEEE
14 years 9 months ago
2011
IEEE
Dynamic languages such as Javascript are the de-facto standard for web applications. However, generating efficient code for dynamically-typed languages is a challenge, because it...
172
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ASPLOS
1998
ACM
15 years 10 months ago
1998
ACM
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
132
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MICRO
2006
IEEE
16 years 10 hour ago
2006
IEEE
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
167
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MICRO
2003
IEEE
15 years 11 months ago
2003
IEEE
In this paper we address the design of a future high-speed router that supports line rates as high as OC-3072 (160 Gb/s), around one hundred ports and several service classes. Bui...